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Implementation of LOSSY image compression by discrete wavelet transform

Author Affiliations

  • 1Department of Electronics, MGCGV Chitrakoot, Satna, India
  • 2Department of Science and Environment, MGCGV Chitrakoot Satna, India

Res. J. Engineering Sci., Volume 7, Issue (3), Pages 1-7, March,26 (2018)


The discrete wavelet transform (DWT) represents images as a sum of wavelet functions (wavelets) on different resolution levels. The wavelet transform can be composed of any function that satisfies requirements of multiresolution analysis and exists a large selection of wavelet families depending on the choice of wavelet function. The choice of wavelet family depends on the application. In image compression application this choice depends on image type. A fundamental shift in the image compression approach came after the Discrete Wavelet Transform (DWT) is growing fast. In this paper, the design of DWT with new Vedic multiplier is presented in 2d-DWT structure, Digital FIR filter is used to increase the image resolution and remove the unwanted noise present in the image. This research work presents the efficiency of Urdhva Triyagbhyam Vedic method for multiplication which strikes a difference in actual process of multiplication itself. Multiply Accumulate unit (MAC) is a key component in the most of the digital signal processors, in order to make a balance in the key performance characters like speed, power and area, a gate level implementation of the design is adopted in the entire research work.


  1. Rao R.M. and Bopardikar A.S. (1999)., Wavelet Transforms: Introduction to Theory and Applications., Pearson Education.
  2. Grgic S. and Kers K. (1999)., Image compression using Wavelets., IEEE Industrial Electronics, ISIE’99, 1, 99-104.
  3. Kumar Mandal Mrinal (2010)., Digital image compression Technique, Springer International Series in Engineering and Computer Science Book (SECS)., Multimedia Signals and Systems, 716, 169-202. ISSN: 0893-3405.
  4. Mohanty B.K. and Meher P.K. (2013)., Memory-efficient high-speed convolution-based generic structure for multilevel 2-D DWT., IEEE Transactions on Circuits and Systems for Video Technology, 23(2), 353-363.
  5. Mohanty B.K. and Mahajan A. (2013)., Efficient-block-processing parallel architecture for multilevel lifting 2-D DWT., ASP Journal of Low Power Electronics, 9(1), 37-44.
  6. Gokhale G.R. and Bahirgonde P.D. (2015)., Design of Vedic-Multiplier using Area-Efficient Carry Select Adder., IEEE, 32, 987-992.
  7. Gokhale G. and Gokhale S. (2015)., Design of Area and Delay Efficient Vedic Multiplier Using Carry Select Adder., IEEE transaction, 12, 376-380.
  8. Mohanty B.K. and Mahajan A. (2013)., Scheduling-scheme and parallel structure for multilevel lifting 2-D DWT without using frame-buffer., IET Circuits, Devices and Systems, 5, 149-154.
  9. Tian X., Wei J. and Tian J. (2010)., Memory-efficient architecture for fast two dimensional discrete wavelet transform., in Proc. IEEE International Conference on Computational Intelligence and Software Engineering (CiSE), 2, 1-3.
  10. Tian X., Wu L., Tan Y.H. and Tian J.W. (2011)., Efficient multi-input/multi-output VLSI architecture for two-dimensional lifting-based discrete wavelet transform., IEEE Transactions on Computers, 60(8), 1207-1211.
  11. Tseng P.C., Huang C.T. and Chen L.G. (2002)., Generic RAM-based architecture for two dimensional discrete wavelet transform with line based method., in Proc. Asia Pacific Conference on Circuits and Systems (APCCAS), 1, 363-366.
  12. Mohanty B.K. and Meher P.K. (2011)., Memory-efficient architecture for 3-D DWT using overlapped grouping of frames., IEEE Transactions on Signal Processing, 59(11), 5605-5616.
  13. Mohanty B.K., Mahajan A. and Meher P.K. (2012)., Area and power-efficient architecture for high-throughput implementation of lifting 2-D DWT., IEEE Transactions on Circuits and Systems–II, Express Briefs, 59(7), 434-438.
  14. Kant Akanksha and Sharma Sobha (2015)., Applications of Vedic multiplier designs - a review., IEEE transaction on image processing, 978, 4673-4679.